1. Field of the Invention
The present invention relates to the testing of integrated circuits by electron beam scanning, and more specifically to test pads that provide access to buried metallizations to measure their potential with the electron beam.
2. Discussion of the Related Art
FIG. 1 schematically illustrates the principle of electron beam scanning measurement. A surface 10 is bombarded by a beam of primary electrons e.sup.-.sub.p, the energy of which can vary from several hundred eV to some ten keV. Surface 10 then reemits several types of electrons, that is, Auger electrons, backscattered electrons, and secondary electrons. In electron beam scan tests, the reemitted secondary electrons e.sup.-.sub.s, the energy of which does not exceed 50 eV, are captured. The energy of secondary electrons has the unique property of varying according to the potential V of surface 10 at the level of the point of impact of the primary electron beam.
This principle is used in integrated circuit testing tools. It first enables an enlarged image of the surface of a chip to be obtained by scanning this surface with the electron beam. It further enables measurement of the variations of the potentials at chosen points of the chip by slightly deviating the electron beam so that it hits these points. Thereby, the variations of the potentials on surface metallizations or on surface test pads connected to buried metallizations are sampled.
FIG. 2 schematically and partially shows a cross-sectional view of an integrated circuit at the level of a conventional test pad. Test pad 12 is a metal pad, generally square-shaped, formed in the last level of metallization of the integrated circuit. Present technologies enable to obtain five metallization levels to be obtained; pad 12 is then performed in the fifth level M5. In the example of FIG. 2, pad 12 is meant to enable the measurement of the potential of a metallization 14 of third level M3.
To connect metallization 14 to pad 12, a connection pad 16 is provided in each intermediary metallization level, here level 4 only. Metallization 14 to be tested, the intermediary connection pads 16, if present, and finally test pad 12, are electrically interconnected by vias 17.
Test pad 12 is generally surrounded with many other metallizations 19 of different levels.
As is shown in FIG. 2, an integrated circuit is normally covered with an insulating and protective coating 22, generally formed of a silicon oxide layer and of a passivation layer.
This insulating coating 22 hinders the direct measurement of the potential of the surface metallizations with an electron beam.
In prior technologies greater than 0.35 .mu.m, the potential variations of the surface metallizations can be measured by capacitive effect. Indeed, the potential variations of the surface metallizations cause, by capacitive coupling, similar potential variations, but these variations are attenuated at the external surface of insulating coating 22. These attenuated variations can thus be measured by the electron beam testing system.
However, for newer technologies less than 0.35 .mu.m, the metallization networks are so dense, in particular metallization 19 is so close to pad 12, that the useful potential variations generated by pad 12 are drowned in the noise of the potential variations generated at the same level by the surrounding metallizations 19.
To be able to test integrated circuits implemented in recent technologies with electron beams, insulating coating 22 is removed to expose the metallizations of the last level. A direct potential measurement which is not influenced by the potentials of the surrounding metallizations can thus be performed.
This technique requires a relatively complex step of removal of insulating layer 22. Further, the removal of insulating layer 22 decreases the surface metallization capacitances, which results in an increase of the operating speed of some elements of the integrated circuit. This can make integrated circuits which have been optimized, by taking into account normal propagation times in the particular technology used, inoperative.